BiTS 2017 Advance Program

The BiTS 2017 Technical Program is overflowing! Now in BiTS' 18th year, the Program Committee was challenged to find room for all the excellent presentations and posters.

This year we have nine (!) jam-packed presentations sessions. Plus a poster session with over eighteen presentations. You will not want to miss these presentations and posters by test and burn-in experts from around the world. This is complimented with an excellent Tutorial on Sunday, the ever-popular BiTS EXPO, and numerous networking and social events.

We hope that you enjoy the best available presentations and posters covering all aspects of test and burn-in.




Please see the entire schedule below...


Tutorial Day
Sunday March 5, 2017
noon - 6:00 PM
Tutorial
Interconnect Sockets and Applications

Ashok_Kabadi
Ashok Kabadi
Managing Director
AK Technology (AKT) Leadership


Mohan Prabhugoud
Mohan Prabhugoud
Senior Mechanical Engineer
Intel Corp.

In this tutorial, we will go over the socket contact element fundamentals, types of socket contact elements, contact element materials, and printed circuit board (PCB) & hardware requirements. We will also cover electrical, and system design and test requirements. We will provide you with different options for selecting interconnect sockets depending on your requirements like signal integrity, cycle life, cost, etc.

At the end of the course, you will have a clear understanding of the types of sockets available in the industry, how to select the best one for your needs, and how to successfully develop and implement the same.

Target audience includes: PCB designers, mechanical engineers, hardware engineers, hardware engineering managers, and materials engineers.

Objectives

  • Understand what the interconnect socket is and its benefits
  • Understand the contact elements and resistances
  • Understand different types of interconnect sockets available in the industry and their applications
  • Provide overview of different PCB plating available in the industry and their applications
  • Understand mechanical system design methodologies with special emphasis on tolerances, PCB Keep-Out-Zones (KOZs) and retention design
  • Provide overview of electrical signal integrity measurements
  • Understand test and validation requirements for interconnect technologies
  • Understand the entire end-to-end process flow, right from gathering the requirements to successful implementation

Note: Attendance at the tutorial will be limited. Please sign-up early to not miss out!

Ashok Kabadi joined Intel as a Manufacturing Engineer in the Systems Manufacturing Department in 1981. Over his thirty-five year career at Intel, his technological innovations advanced the high-tech industry. His last role was Mechanical Architect and Senior Principal Engineer in the Platform Hardware Group (PHG). Ashok drove the development of multiple advanced platform technologies whichhad significant and measurable impact on improving the cost and time-to-market (TTM) of Intel products as well as external customer products, These technologies included Metallized Particle Interconnect (MPI) sockets, zero keepout (ZKO) sockets, and coax via technology. Ashok was also the key driver for building the Technical Leadership Program in Guadalajara, Mexico (GDC), as well as personally mentoring and growing the pipeline of technical talent in GDC.

He has a deep passion for innovation in the areas of socket interconnect, thermal design, and printed circuit boards. In addition to 16 patents, he has delivered multiple publications, presentations and talks at conferences within the US and internationally. Ashok is now Managing Director of AK Technology (AKT) Leadership providing consulting services and the BiTS Workshop Technical Program Co-chair.

Mohanraj Prabhugoud is currently a Senior Mechanical Engineer at Intel Corporation. He has worked on mechanical design of sockets, socket retention, thermal margining tool, heat sink, PCBs, chassis, etc for over ten years. Mohanraj Prabhugoud received his MS and PhD in Mechanical Engineering degrees from North Carolina State University.

6:30 - 7:30 PM
Welcome Reception
If this is your eighteenth time attending BiTS Workshop, only your first, or somewhere in-between you will feel welcomed at the opening reception by friends old and new.
7:30 - 8:30 PM
Dinner
The first of many excellent meals awaits as you get to network with other industry professionals. This is a great time to catch up with old colleagues or start meeting new friends.
8:30 PM - 9:30 PM
Market Session
The eagerly awaited overviews of the socket and contactor market along with general market trends will set the stage for what is now & next in test.
"Marketplace Report"
Ira Feldman
Feldman Engineering Corp.
"Market Connections – Semiconductors to Sockets"
John West
VLSI Research
Performance Day
Monday March 6, 2017
7:00 - 8:30 AM
Continental Breakfast
Start the day right and enjoy the continental breakfast while networking with other attendees.
8:30 - 9:00 AM
Opening Remarks
Welcoming remarks from the General Chair, Ira Feldman
9:00 - 10:00 AM
Keynote Address
Identifying the path to success for Industry 4.0
Thomas Sonderman
Thomas Sonderman
Vice President &
General Manager
Integrated Solutions Group
Rudolph Technologies

Keynote sponsored by Indium Corporation

 

Supply chain complexity is driving the need for new and increasingly advanced analytical solutions to ensure products are delivered on time and with the highest possible quality. In the future, it will become essential for companies to produce digital threads linking all relevant information into product signatures. These product signatures can then be diagnosed and translated into actionable intelligence throughout the value chain. However, to realize this end-state, companies will need to embrace a new paradigm of trust and collaboration.

The industry’s challenge is to create this type of enhanced traceability without sacrificing the intellectual property (IP) and security of product (IP) companies, manufacturers and suppliers. This is further complicated by the level of maturity and information technology (IT) sophistication of the various stakeholders within the electronics ecosystem. By leveraging the Internet of Things (IOT) and associated technologies, companies can quickly integrate advanced analytical and control solutions into their manufacturing environments, accelerating the adoption and the resulting benefits of the analytics.

With the shared goal of establishing real-time situational awareness for improved value chain decision-making, companies will embrace this next stage of industry evolution – the migration to a connected digital environment that enables a flexible, adaptable and intelligent product delivery system. The resulting return on investment (ROI) from this type of investment will continue the industry’s long term trend of delivering the right products, at the right time and with the requisite economics to ensure both consumer and commercial adoption.

Thomas Sonderman is Vice President and General Manager of Rudolph Technologies’ Integrated Solutions Group. He previously served as vice president of manufacturing technology at GLOBALFOUNDRIES where he held global responsibility for creating multi-fab breakthrough solutions that generate critical competitive advantage for the foundry business leveraging GLOBALFOUNDRIES’ proprietary Design Enhanced Manufacturing (DEM) and Automated Precision Manufacturing (APM) technologies. Mr. Sonderman joined GLOBALFOUNDRIES after more than 20 years with AMD, where he held numerous executive management and engineering positions. Prior to joining AMD, Mr. Sonderman worked as a process control engineer for Monsanto Chemical Inc. He is a recognized expert in the area of manufacturing control and automation for high-volume semiconductor fabrication and is a highly sought-after speaker at industry conferences. Mr. Sonderman is the author of over 45 patents and has published numerous articles in the area of manufacturing technology. Mr. Sonderman received a bachelor's in chemical engineering from the Missouri University of Science and Technology in 1986 and a master's in electrical engineering from National Technological University in 1991.

10:00 - 10:30 AM
Break & Networking
Enjoy the break and networking time.
10:30 AM - 12:30 PM
Session 1
Driving Performance
Automotive & mm-wave applications
Always connected mobile devices – from smartphones to automobiles - are driving the need for higher performance test solutions as bandwidth and frequency requirements increase. Markus Wagner of Cohu and Milen Cheshmedjiev of Melexis discusses development and characterization of a new contact technology focused on achieving high current and stable contact resistance required for long-life tri-temperature automotive applications. Next generation 5G communication will use millimeter (mm)-wave frequencies and Carol McCuen of R&D Altanova shows how to improve the performance of the printed circuit board (PCB) in these higher frequencies. Noureen Sajid of Johnstech International reviews testing of 80 GHz QFN packages demanded by automotive radar, telecommunications, and other new millimeter-wave applications. Contactor-based testing of automotive radar presents significant challenges highlighted by Brian Nakai of NXP Semiconductors.
"Design for performance and advanced characterization of new contactors"
Markus Wagner
Cohu
Milen Cheshmedjiev
Melexis
"Investigation into Various Via Structures in High Speed Interconnect"
Carol McCuen
R&D Altanova
"Contactor and Package Design Effects on Crosstalk"
Noureen Sajid
Johnstech International
Jeff Sherry
Johnstech International
"Contactor Based Final Test at 77 GHz on a Multi-Channel Radar Transceiver Chipset"
Brian Nakai
NXP Semiconductors
Jeffrey Finder
NXP Semiconductors
12:30 - 1:30 PM
Lunch
Lunch is served. Enjoy the break and networking time.
1:30 PM - 3:30 PM
Session 2
Performance Prediction
Electrical simulation
As test application challenges continue to increase, old “rules of thumb” are no longer good enough for design. Electrical simulation is essential to knowing if a solution will work before it is built. Frank Zhou of Smiths Connectors discusses simulation and measurement results showing how impedance controlled sockets have evolved over time to handle higher frequency requirements. Designing and verifying next generation transceivers running at 100 Gbs pose significant challenges presented by Jackie Luo of Zenfocus Semi-Tech. As frequencies rise, every detail including the metal used in the pad “stack” matters as Gert Hohenwarter from Gatewave Northern demonstrates. Yuanjun Shi of TwinSolution Technology provides results from finite element analysis (FEA) and lab measurements to support very high current applications.
"Coaxial Test Socket - Evolution & Optimization"
Frank Zhou
Smiths Connectors
"100G Testing Fixture Design and Verification"
Jackie Luo
Shanghai Zenfocus Semi-Tech
"Inductance Rise Due To Plating"
Gert Hohenwarter
GateWave Northern, Inc.
"Spring probe current-carrying capacity (continuous vs pulse) analysis and improvement"
Yuanjun Shi
TwinSolution Technology Ltd
3:30 PM - 4:30 PM
Poster Session
Break & Networking
Poster Sessions are a great way to network through interaction with the poster presenters and other curious bystanders. At the same time enjoy the break refeshments and networking.
"Enabling Temperature Margining Solutions for Validating Automotive Electronics in Lab Automation Environment"
Ying Feng Pang
Intel Corporation
Hagai Wertheim
Intel Corporation
Rahima Mohammed
Intel Corporation
Amy Xia
Intel Corporation
"Tool-less Thermal Tool Thermal Interface Material Holder and Package Pusher"
Nicky Srumtza
Intel Corporation
"New Gimbaling Mechanism for Automated Test Systems"
Nicky Srumtza
Intel Corporation
"Development of fan-out layer assembled 100um pitch BGA socket with 3D MEMS Technologies"
Sungho Kim
Microfriend Inc.
Eunkyung Lee
Microfriend Inc.
Sanghee Park
Microfriend Inc.
Jongmyeon Lee
Microfriend Inc.
"Extremely short spring probe and socket body"
AJ Park
IWIN Co.,LTd.
"Design method to endure the stress by high spring pin counts on the wafer test"
Shin-Ho Kang
Samsung Electronics Company
Gyu-Yeol Kim
Samsung Electronics Company
Sang-kyu Yoo
Samsung Electronics Company
"Heat/Cold Resistant Dicing Tape for Frame Handling Final Test"
Eiji Hayashishita
Mitsui Chemicals Tohcello, Inc
Akimitsu Morimoto
Mitsui Chemicals Tohcello, Inc.
Hideki Fukumoto
Mitsui Chemicals Tohcello, Inc.
"Air Cooled Thermal Tool for System Level High Volume Manufacturing Testing"
Rahima Mohammed
Intel Corporation
Ridvan Sahan
Intel Corporation
Ying-feng Pang
Intel Corporation
Amy Xia
Intel Corporation
Hagai Wertheim
Intel Corporation
"Elastomer Qualification Case Study for Extended Duration Contact Cycles"
Mike Dell
ISC
Emad Al-Momani
Intel
"Universal adjustable docking for automated test equipment systems"
Jess Coleta
On Semiconductor Phillipines
Willy Ganoy
ON Semiconductor Philippines
"Design, Fabrication, and Characterization of Dense and Large-stand-Off Compressible MicroInterconnects (CMIs) for Advanced Testing and Socket System Application"
Paul Jo
Georgia Institute of Technology
Muneeb Zia
Georgia Institute of Technology
Joe Gonzalez
Georgia Institute of Technology
Muhannad Bakir
Georgia Institute of Technology
"Low Cost / Low Profile Spring Probe"
Samuel Park
IWIN Co., Ltd.
"Embedded Thin Film NiP Resistors Relax Signal Integrity Constraints on Printed Circuit Boards Designed for High Speed"
Manuel Herrera
Ohmega Technologies, Inc.
"WL Test Probe Continuous Improvement"
Jim Brandes
Xcerra
"Introduction of Thermal Interface Material (TIM) in Thermal Management Solution"
HH Ng
TTS
"Metallic Thermal Interface Material Selection for Burn-In"
David Saums
DS&A, LLC
Tim Jensen
Indium Corporation
Ron Hunadi
Indium Corporation
Carol Gowans
Indium Corporation
Bob Jarrett
Indium Corporation
"Statistical Method for setting up Safe Screen Voltage for Products"
Krishna Mohan Chavali
Globalfoundries US Inc
"Reliability Evaluation of Wing Riser Solder Joint used in Post Silicon Validation Environment"
Amy Xia
Intel
Ying-feng Pang
Intel
Jack Mumbo
Intel
Emad Al-Momani
Intel
"A Case Study Evaluating the Performance of Carbon Nanotube Based Thermal Interface Materials in a Burn in and Test Application"
Craig E. Green
Carbice Nanotechnologies, Inc
Benoit Foisy
IBM Bromont
Yvan Cossette
IBM Bromont
Leonardo Prinzi
Carbice Nanotechnologies, Inc
Baratunde Cola
Carbice Nanotechnologies, Inc
4:30 PM - 6:00 PM
Session 3
Reality Check
Validation
Everything can be designed “properly” and be within specification and still not work as intended. There are many challenges and new product “bring up” doesn’t end until the design is fully validated. Testing devices in the product environment pose their own special challenges. Instead of developing special validation load boards, John Kelbert of Intel shows using an interposer approach to add the required capabilities to the product PCB. Matthew Priolo of Intel reviews challenges and solutions for cases where the validation test hardware requires more space than is available on the product PCB. Not only do products require careful validation, so do production device under test (DUT) setups as Martin Gao from Texas Instruments explains.
"Augmenting form factor designs with validation and debug capability"
John Kelbert
Intel Corporation
"New Possiblity with Coax Via Risers"
Matthew Priolo
Intel Corporation
Adrian Rodriquez
Intel Corporation
Christopher Kinney
Intel Corporation
Adewale Oladeinde
Intel Corporation
"Processes for Validating and Maintaining Electrical DUT Interfaces"
Martin Gao
Texas Instruments
Carolina Lock
Texas Instruments
6:00 - 9:00 PM
BiTS EXPO &
Reception
The BiTS EXPO is a very popular part of the BiTS program with many great exhibits to explore what is Now & Next in the test and burn-in of packaged semiconductors. There is always something new to see or someone new to meet. Not to mention excellent food, drinks, and time for attendees to network with exhibitors!
Frontier Day
Tuesday March 7, 2017
7:00 - 8:00 AM
Continental Breakfast
Start the day right and enjoy the continental breakfast while networking with other attendees.
8:00 - 10:00 AM
Session 4
Launch Pad
Load Boards & Burn-in Boards
Designers of printed circuit boards (PCBs) for use as test load boards and burn-in boards face many challenges driven by the test and operational requirements. Willy Ganoy from ON Semiconductor reviews a new design method to permit switching of contact technology on the load board. How to burn-in high frequency low voltage differential signal (LVDS) devices is a challenge that Rolando Reyes of Analog Devices explores. Bruce Mahler demonstrates new ways of embedding thin film heaters for precise DUT temperature control. Developing retrofitting legacy burn-in boards to handle voltage surges is more practical than replacing them as shown by Gil Conanan of Analog Devices.
"Load Board PCB Socket Contact Pad Solution"
Willy Ganoy
ON Semiconductor Philippines
Jess Coleta
ON Semiconductor Philippines
"Addressing high frequency challenges for burn-in requiring LVDS"
Rolando Reyes
Analog Devices Inc
"New Applications for Embedded Thin Film Heaters"
Bruce Mahler
Ohmega Technologies, Inc.
"Adressing the EOS on legacy burn-in boards with over voltage protection through a modular design"
Gil Conanan
Analog Devices, Inc.
10:00 - 10:30 AM
Break & Networking
Enjoy the break and networking time.
10:30 AM - 12:30 PM
Session 5
Heating Up
Burn-in, Thermal, & MEMS Test
Measuring device under test (DUT) performance under different thermal conditions is an essential part of a robust test process. Accurate characterization and control of the heat is necessary for accuracy, repeatability, and avoiding device damage. Standardization and auditing is essential to improve burn-in yield and quality as shown by Jeanette Linn from Texas Instruments. Barry Johnson of inTEST Thermal discusses options for managing and forcing DUT temperatures at the load board and system board levels. It is important to have a process to qualify the high voltage stress applied during burn-in explains Krishna Mohan Chavali from Globalfoundries.

Similar to thermal testing, MEMS testing requires a variety of non-electrical stimuli which present their own challenges. Wendy Chen of KYEC reviews the challenges of MEMS device testing in a very complex supply chain.

"Process Improvements to Increase Burn-In Yield and Quality"
Jeanette Linn
Texas Instruments
Rich Karr
Texas Instruments
"Device Characterization Over Temperature at the Board Level"
Barry Johnson
inTEST Thermal Solutions
"Qualifying A Process For Higher Burn-In Voltage Application"
Krishna Mohan Chavali
Globalfoundries US Inc
"Coming Challenges and Opportunities for MEMS Testing Supply Chain"
Wendy Chen
KYEC
12:30 - 1:30 PM
Lunch
Lunch is served. Enjoy the break and networking time.
1:30 - 3:30 PM
Session 6
Making Contact
Contact Technology - 1 of 2
There are many challenges to making good electrical contact including high current, fine pitch, and other application specific requirements. Thiha Shwe of Texas Instruments high current problems solved. Challenges of a new board-to-board application are explained by Derek Biggs from Plastronics. Valts Triebergs of Xcerra Corporation summarizes new and existing industry approaches to 0.2 mm pitch wafer level chip scale packaging (WLCSP) contact. A standardized approach for managing burn-in sockets is discussed by James Tong from Texas Instruments.
"High Current Final Test Contactor Development"
Thiha Shwe
Texas Instruments
Hisashi Ata
Texas Instruments
Kenichi Sato
Yokowo
"Customers Are the New Team Member for Board to Board Connectors"
Derek Biggs
Plastronics
"WLCSP Contacting Technologies for 0.2 mm Pitch and Below"
Valts Treibergs
Xcerra Corporation
"Coming to terms with Burn-In sockets"
James Tong
Texas Instruments
3:30 - 6:30 PM
BiTS EXPO
Continue to explore the great exhibits at the BiTS EXPO to see what is Now & Next in the test and burn-in of packaged semiconductors. There is always something new to see or someone new to meet. Refreshments and drinks are served but don't spoil your appetitute before the BiTS Social...
6:30 - 9:30 PM
BiTS Social Event
To be Announced...
Solutions Day
Wednesday March 8, 2017
7:00 - 8:00 AM
Continental Breakfast
Start the day right and enjoy the continental breakfast while networking with other attendees.
8:00 - 10:00 AM
Session 7
Teaming Up
Handler / Test Cell
As test requirements in performance and cost become greater challenges, higher levels of integration are essential in the test cell. Any single element – material handling, test electronics, consumables including load boards and contactors, software, etc. – that is poorly integrated or fails can cause the entire test cell to fail. Finite element analysis (FEA) can be used to predict performance of interface hardware explains Jason Koh of Test Tooling Solutions Group. Yaniv Raz from Intel demonstrates how they automated the physical handling of burn-in boards which have become significantly heavier as additional test functionality is added. The challenges of test and burn-in for optical devices in package and on-wafer is shown by Carl Kasinksi of Aehr. Mike Frazier of Xcerra presents how to handle and test singulated wafer level chip scale packaging (WLCSP).
"Applying FEA Simulation for Test Interface Unit"
Jason Koh
Test Tooling Solutions Group
"BI RHINO Handling Solution"
Yaniv Raz
Intel
"Optical Device Testing at Wafer Level and Package Devices"
Carl Kasinski
Aehr
"Fan-in WLCSP Test Requirements"
Mike Frazier
Xcerra
10:00 - 10:30 AM
Break & Networking
Enjoy the break and networking time.
10:30 AM - noon
Session 8
Contact Frequency
Contact Technology - 2 of 2
There were an abundance of excellent presentations on the challenges of contact technology, so a second session was needed to focus on high frequency applications. Gerhard Gschwendtberger of Cohu explains a new type of contact element for very small contacts for high frequency and analog applications. Additional improvements in their hybrid micro-electromechanical system (MEMS) and elastomer technology is shared by BoHyun Kim from TSE. Jason Mroczkowski of Xcerra reviews and compares flat and radial probe technologies for high frequency testing.
"Small Form Factor Cantilever Concepts for High Performance Analog / RF Applications"
Gerhard Gschwendtberger
Cohu
"MRC (MEMS Rubber Contact) Socket Bump Particle Structure & Performance Analysis"
BoHyun Kim
TSE Co,.Ltd
Dave Oh
TSE Co, ltd
Justin Yun
TSE Co, ltd
"Flat Probe Technology For High Frequency Test"
Jason Mroczkowski
Xcerra
Nadia Steckler
Xcerra
noon - 12:30 PM
Awards &
Closing Remarks
It's been three and a half days packed with learning, exploring, and sharing. Before we pack our bags and take what we've learned back to our jobs, there are a few closing remarks. We will take a moment to reflect and recognize the people, presentations, and posters that have distinguished themselves at BiTS 2017.
Program subject to change without notice.
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